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- LDO design issue - no load condition | Forum for Electronics
Hi I am working on a LDO design that requires a rather large PMOS pass transistor due to the specified max current I have issues with pulling the pass transistor gate high enough at no load conditions to avoid the output voltage creeping upwards due to leakage in the pass transistor In
- Comparison of LDO and level shifter | Forum for Electronics
Re: LDO vs Level shifter Yes, although if good efficiency and good noise performance were required, I would use a switcher to drop most of the voltage then use the LDO to regulate to the final voltage
- How to measure psrr of LDO? | Forum for Electronics
how to measure psrr hi,all Can anybody suggest me how to measure psrr of LDO? Could anybody suggest the ways and the required instruments I need to use? Thanks a lot
- behavioral modelling for LDO - Forum for Electronics
For a LDO, I think the most important part is the opamp So, only the opamp need to be described with verilog-a language Spectre provide a lot of behavioral module in its ahdlLib and you can find what you want Otherwise, you can build your own verilog-a module by refer to the verylog-a Reference
- LDO with NMOS as pass transistor. . | Forum for Electronics
ldo nmos transistor Embedded 5V to 3 3V voltage regulator for supplying ics in 3 3v CMOS technology IEEE JSSC Vol 33 No 7 July 1998 This is a paper on NMOS pass trans voltage regulator with replica bias
- Pass transistor in LDO - Forum for Electronics
The PMOS pass transistor is not in saturation alll the time why is it so The gate input i fed is less than 1 5v BTW Input to voltage regulator is 2-2 4 output should be 1 8v so the table i ve attached is the various input voltage and region in which M15 is Please tell what s been wrong
- How to properly do AC open loop LDO simulation?
ldo simulation setup in hspice there is a resistance that when dc the value is zero, but when ac, it is open Can we just use the thing?
- LDO feedback resistor divider | Forum for Electronics
Hi, I wonder what is the motivation behind taken a ratio of LDO output voltage through a resistive divider and feeding it with a reference? what are the disadvantages of comparing Vout to VREF directly? Is the availability of a particular reference voltage the main reason? If the LDO output
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