|
- RISC-V International
RISC-V is revolutionizing the automotive industry by providing a flexible and open architecture that enables customized, efficient computing solutions for advanced driver-assistance systems (ADAS) and autonomous vehicles
- RISC-V Ratified Specifications
The RISC-V ISA specifications, extensions, and supporting documents are collaboratively developed, ratified, and maintained by contributing members of RISC-V International These specifications are all free and publicly available
- Introduction — RISC-V - Getting Started Guide
RISC-V (pronounced “risk-five”) is an open, free ISA enabling a new era of processor innovation through open standard collaboration It’s both academia- and industry friendly, open to scrutiny, built from scratch with security and modern use cases in mind
- RISC-V · GitHub
The Open-Standard Instruction Set Architecture RISC-V has 62 repositories available Follow their code on GitHub
- The RISC-V Instruction Set Manual
Introduction RISC-V (pronounced “risk-five”) is a new instruction-set architecture (ISA) that was originally designed to support computer architecture research and education, but which we now hope will also become a standard free and open architecture for industry implementations Our goals in defining RISC-V include:
- An Introduction to RISC-V—Understanding RISC’s Open ISA
This article is a primer into the basics of RISC-V The open architecture philosophy is exposed, along with a technical description of the modular ISA, and some commercial RISC-V microprocessor implementations
- What is RISC-V? – How Does it Work? | Synopsys
RISC-V is an open-source instruction set architecture used to develop custom processors for a variety of applications, from embedded designs to supercomputers
- Introducing HAL riscv-rvv: Unleashing the power of RISC-V CPUs . . . - OpenCV
RISC-V (pronounced “risk-five”) is an open standard instruction set architecture (ISA) based on the principles of reduced instruction set computing (RISC) Unlike proprietary ISAs such as Intel’s x86 or ARM’s architecture, RISC-V is free to use and modify, enabling companies and researchers to design custom processors without licensing
|
|
|